An Efficient Field Programmable Gate Array Implementation of Double Precision Floating Point Multiplier using VHDL

Floating point arithmetic is widely used in many areas, especially scientific computation and signal processing. The main applications of floating points today are in the field of medical imaging, biometrics, motion capture and audio applications. Multipliers play an important role in today‟s digital signal processing and various other applications. A system‟s performance is generally determined by the performance of the multiplier, because the multiplier is generally the slowest element in the system. The way floating point operations are executed depends on the data format of the operands. IEEE standards specify a set of floating point formats single precision and double precision. This paper presents an efficient FPGA implementation of double precision floating point multiplier using VHDL.